Workshop on Parallel and Distributed Computing in Image
Processing, Video Processing, and Multimedia (PDIVM'2002)
Fort Lauderdale, US, April 15th, 2002
Session 1: 8:15 - 10:00
Chair: S. Panchanathan, Arizona State University
- 8:15 Welcome to PDIVM'2002
S. Panchanathan, Arizona State University (US) and A. Uhl, Salzburg University (Austria)
- 8:30 Symmetrical pair scheme: a load balancing strategy to solve intra movie
skewness for parallel video servers
S. Wu and H. Jin, Huazhang University of Science and Technology (China)
- 9:00 Performance evaluation of a distributed video storage system
A. Bonhomme and L. Prylli, INRIA Rocquencourt and ENS-Lyon (France)
- 9:30 Request redirection and data layout for network traffic balancing in cluster-based VoD servers
X. Zhou and C.-Z. Xu, Wayne State University (US)
Coffee break: 10:00 - 10:30
Session 2: 10:30 - 12:30
Chair: E.G.T. Jaspers, Philips Research Laboratories
- 10:30 Efficient applications in user transparent parallel image processing
F.J. Seinstra, D. Koelma, J.M. Geusebroek, F.C. Verster, and A.W.M. Smeulders, University of Amsterdam (The Netherlands)
- 11:00 Efficient wavelet-based video coding
M. Feil and A. Uhl, Salzburg University (Austria)
- 11:30 Real-time communication for distributed vision processing based on imprecise computation model
H. Yoshimoto, D. Arita, and R. Taniguchi, Kyushu University (Japan)
- 12:00 Optimizations in the Grid visualization kernel
D. Kranzlmüller, G. Kurka, P. Heinzlreiter, and J. Volkert, University of Linz (Austria)
Lunch break: 12:30 - 14:00 (Workshop Lunch)
Session 3: 14:00 - 15:00
Chair: S. Panchanathan, Arizona State University
- 14:00 Invited Talk: System-level Analysis for MPEG-4 Decoding on a Multi-processor Architecture
E.G.T. Jaspers, E. B. van der Tol, and P.H.N. de With, Philips Research Laboratories and Eindhoven University of Technology (The Netherlands)
Coffee break: 15:00 - 15:30
Session 4: 15:30 - 17:00
Chair: E.G.T. Jaspers, Philips Research Laboratories
- 15:30 Variable partitioning and scheduling of multiple memory architectures for DSP
Q. Zhuge, B. Xiao, and E. H.-M. Sha, University of Texas (US)
- 16:00 Eclipse: heterogeneous multiprocessor architecture for flexible media processing
M.J. Rutten, J.T.J. van Eijndhoven, and E.-J.D. Pol, Philips Research Laboratories (The Netherlands)
- 16:30 Pattern Recognition Based Routing Architecture Design of MPEG4 Video Application
A. Akoglu and A.R. Dasu, Arizona State University (US)